As the density of semiconductor elements is intensified, the cell size of DRAMs is made smaller, thereby resulting in a reduction in capacitance of a stacked capacitor of the DRAMs. The remedial measures for increasing the capacitance of the stacked capacitor involve a reduction in the thickness of the dielectric layer or a change in the ingredients of which the dielectric layer is made. The focus of the recent development in the field is a method by which the electrode surface area is increased by taking advantage of the three-dimensional structure, as exemplified by a research which was done and published by H. Watanabe, et. al. in J. APPL. PHYS. 71 (7), Apr. 1, 1992, pp. 3538-3543, and by another research which was done and published by M. Yoshimaru, et al., in 1990 IEEE IEDM, pp. 659-662. The methods involve forming a polysilicon film having an appropriate thickness with an appropriate deposition rate at a temperature ranging between 560 and 600.degree. C. by low-pressure chemical vapor deposition (LPCVD), whereby the polysilicon film so formed has a hemispherical grained (HSG) surface and thus increasing the polysilicon electrode surface area. The polysilicon electrode may be columnar in shape, as disclosed in a research report by H. Watanabe, et al. in 1992 IEEE IEDM, pp. 259-262. Another report, which was published by H. Watanabe, et al. in SYMPOSIUM ON VLSI TECHNOLOGY, 1993, pp. 17-18, discloses a process for forming a porous polysilicon layer and a surface having micro cavities by impregnating a phosphorus-doped polysilicon in phosphoric acid at a temperature of 150.degree. C. It was pointed out by H. Watanabe, et al. in the report that the grain boundaries of the polysilicon film, which contains a high concentration of phosphorus, are severely etched by the phosphoric acid treatment at a high temperature. A further research, which was carried out by us, shows that the film surface is provided with trenches in addition to the micro cavities after a phosphorus-doped polysilicon is treated at 120.degree. C. by the phosphoric acid, wherein said phosphorus-doped polysilicon is doped by means of an ion implantation or POCl.sub.3 diffusion and then activated by means of a high temperature activation. The film surface so formed is shown by scanning electron microscope (SEM) photograph in FIG. 1. The entire film surface is provided with a number of islands. Now referring to FIG. 2, a top-view micrograph of the film surface, which was taken by a transmission electron microscope (TEM), reveals that the silicon grains of the polysilicon are similar in size and form to the islands of the film surface, thereby confirming our belief that the etching was done by the phosphoric acid along the grain boundaries. FIG. 3 shows the measured sheet resistance values of the polysilicon films having various doped concentrations which were treated with the phosphoric acid for various duration. It is clearly shown that the increments in sheet resistance values are in a direct proportion to the lengths of the etching duration, especially in situations in which the phosphorus-doping concentrations are high. In the case where the phosphorus-doping concentration is 6E15/cm.sup.2, an open-circuit takes place when the duration of the phosphoric acid treatment exceeds 60 minutes. We believe that the open-circuit phenomenon is the consequence of a fact that the grain boundaries of the polysilicon are totally etched, which has a detrimental effect on the production of DRAMs.